195 jobs - Page 1 of 15 (0.16 seconds)
Santa Clara, California
- 9d ago
Candidate should be familiar with some of the following. Verilog, VCS NCsim, Questa, C language or SystemC, Vera, Specman, System Verilog, VMM, UVM. Strong tapeout...
Plattsburgh, New York
- 6d ago
Examples of Duties & Responsibilities. 1. Provide diagnostic and therapeutic speech language services for patients with neurological disorders (e.g., not limited to dementia, TBI, ...
SPACE EXPLORATION TECHNOLOGIES CORP.
- 7d ago
Experience with Verilog and System Verilog. Experience with latest simulation and verification methodologies (OVM, UVM). Experience with EDA tools such as HDL Synthesis (Synopsys DC), HDL...
HCL Technologies Limited
- 11d ago
Experience. 9 11 Years. Qualification. BE B.Tech (Hons). No. of Positions. 2. Skill (Primary). Technical Skills (ERS) VLSI Verification Methodology...
Advanced Micro Devices, Inc
- 3d ago
Demonstrated technical expertise in functional verification of microprocessor ASIC designs. Working knowledge of languages such as C C. Verilog SV UVM Perl etc. Hands on experience with design...
- 4d ago
Requirements. 2 or 4 year degree in Forestry, Horticulture, Natural Resources and or related fields or 12 months line clearance experience. Prefers UVM experience or Certified Arborist...